MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory
The magnetoelectric spin orbit (MESO), one of the emerging spin devices, represents a promising alternative to complementary metal-oxide–semiconductor (CMOS) technology. MESO provides dual functionality: each device can perform logic operations while acting as a nonvolatile memory device....
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2025-01-01
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Series: | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
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Online Access: | https://ieeexplore.ieee.org/document/10843777/ |
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author | Tzuping Huang Linran Zhao Yiming Han Hai Li Ian A. Young Yaoyao Jia |
author_facet | Tzuping Huang Linran Zhao Yiming Han Hai Li Ian A. Young Yaoyao Jia |
author_sort | Tzuping Huang |
collection | DOAJ |
description | The magnetoelectric spin orbit (MESO), one of the emerging spin devices, represents a promising alternative to complementary metal-oxide–semiconductor (CMOS) technology. MESO provides dual functionality: each device can perform logic operations while acting as a nonvolatile memory device. MESO also offers advantages, such as an ultralow supply voltage of 100 mV and the potential to vertically integrate with CMOS, which promises significant energy and area efficiency. These features support MESO’s suitability for improving the energy efficiency and area efficiency of computing-in-memory (CIM) circuits. To harness the advantages of MESO in large-scale complex circuit systems, this article presents the development of a MESO-based standard cell library. This library is critical to realize automated design, as it allows the implementation of all the basic CMOS functions with MESO, thereby enabling MESO-CMOS hybrid design in large-scale complex circuits. This article also introduces a highly area-efficient time-multiplexing technique to optimize the complex function inside CIM. Specifically, the multiplier and multiply-and-accumulate (MAC) circuits using the MESO-CMOS hybrid time-multiplexing technique reduce the area by 85% and 81%, respectively, compared to CMOS implementations. |
format | Article |
id | doaj-art-5db9f7d27ec340dcb773c7f7abb7ec29 |
institution | Kabale University |
issn | 2329-9231 |
language | English |
publishDate | 2025-01-01 |
publisher | IEEE |
record_format | Article |
series | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
spelling | doaj-art-5db9f7d27ec340dcb773c7f7abb7ec292025-02-11T00:01:43ZengIEEEIEEE Journal on Exploratory Solid-State Computational Devices and Circuits2329-92312025-01-01111910.1109/JXCDC.2025.353090610843777MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in MemoryTzuping Huang0https://orcid.org/0009-0004-1603-8414Linran Zhao1https://orcid.org/0000-0002-3127-5838Yiming Han2https://orcid.org/0009-0007-7198-5467Hai Li3https://orcid.org/0000-0001-7668-569XIan A. Young4https://orcid.org/0000-0002-4017-5265Yaoyao Jia5https://orcid.org/0000-0003-2904-1482Chandra Family Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USAChandra Family Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USAChandra Family Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USAExploratory Integrated Circuits, Intel Foundry Technology Research, Hillsboro, OR, USAExploratory Integrated Circuits, Intel Foundry Technology Research, Hillsboro, OR, USAChandra Family Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USAThe magnetoelectric spin orbit (MESO), one of the emerging spin devices, represents a promising alternative to complementary metal-oxide–semiconductor (CMOS) technology. MESO provides dual functionality: each device can perform logic operations while acting as a nonvolatile memory device. MESO also offers advantages, such as an ultralow supply voltage of 100 mV and the potential to vertically integrate with CMOS, which promises significant energy and area efficiency. These features support MESO’s suitability for improving the energy efficiency and area efficiency of computing-in-memory (CIM) circuits. To harness the advantages of MESO in large-scale complex circuit systems, this article presents the development of a MESO-based standard cell library. This library is critical to realize automated design, as it allows the implementation of all the basic CMOS functions with MESO, thereby enabling MESO-CMOS hybrid design in large-scale complex circuits. This article also introduces a highly area-efficient time-multiplexing technique to optimize the complex function inside CIM. Specifically, the multiplier and multiply-and-accumulate (MAC) circuits using the MESO-CMOS hybrid time-multiplexing technique reduce the area by 85% and 81%, respectively, compared to CMOS implementations.https://ieeexplore.ieee.org/document/10843777/Beyond-complementary metal–oxide–semiconductor (CMOS) logiccomputing in memory (CIM)intellectual property (IP) librarymagnetoelectric spin orbit (MESO)multiply-and-accumulate (MAC)reconfiguration |
spellingShingle | Tzuping Huang Linran Zhao Yiming Han Hai Li Ian A. Young Yaoyao Jia MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Beyond-complementary metal–oxide–semiconductor (CMOS) logic computing in memory (CIM) intellectual property (IP) library magnetoelectric spin orbit (MESO) multiply-and-accumulate (MAC) reconfiguration |
title | MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory |
title_full | MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory |
title_fullStr | MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory |
title_full_unstemmed | MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory |
title_short | MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory |
title_sort | meso cmos hybrid circuits with time multiplexing technique for energy and area efficient computing in memory |
topic | Beyond-complementary metal–oxide–semiconductor (CMOS) logic computing in memory (CIM) intellectual property (IP) library magnetoelectric spin orbit (MESO) multiply-and-accumulate (MAC) reconfiguration |
url | https://ieeexplore.ieee.org/document/10843777/ |
work_keys_str_mv | AT tzupinghuang mesocmoshybridcircuitswithtimemultiplexingtechniqueforenergyandareaefficientcomputinginmemory AT linranzhao mesocmoshybridcircuitswithtimemultiplexingtechniqueforenergyandareaefficientcomputinginmemory AT yiminghan mesocmoshybridcircuitswithtimemultiplexingtechniqueforenergyandareaefficientcomputinginmemory AT haili mesocmoshybridcircuitswithtimemultiplexingtechniqueforenergyandareaefficientcomputinginmemory AT ianayoung mesocmoshybridcircuitswithtimemultiplexingtechniqueforenergyandareaefficientcomputinginmemory AT yaoyaojia mesocmoshybridcircuitswithtimemultiplexingtechniqueforenergyandareaefficientcomputinginmemory |