SRAM and Mixed-Signal Logic With Noise Immunity in 3-nm Nano-Sheet Technology
A modular 4.26 Mb SRAM based on a 82 Kb/block structure with mixed signal logic is fabricated, characterized, and demonstrated with full functionality in a 3-nm nanosheet (NS) technology. Designed macros utilize new circuits for supply boosting, read, and write assist techniques. The proposed circui...
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Main Authors: | Rajiv V. Joshi, J. Frougier, Alberto Cestero, Crystal Castellanos, Sudipto Chakraborty, Carl Radens, M. Silvestre, S. Lucarini, I. Ahsan, E. Leobandung |
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Format: | Article |
Language: | English |
Published: |
IEEE
2025-01-01
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Series: | IEEE Open Journal of the Solid-State Circuits Society |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/10839490/ |
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